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A framework for sensitivity analysis of real-time power hardware-in-the-loop (PHIL) systems

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Power hardware-in-the-loop (PHIL) simulation leverages the advanced real-time emulation based technique to carry out in-depth investigations on novel real-world power components. Power amplifiers, sensors, and signal conversion units based power interfaces (PI) incorporate physical hardware systems and real-time simulation platforms into PHIL setups. However, the employment of any interfacing technique inevitably introduces disturbances such as sensor noise, switching harmonics, or quantization noise to PHIL systems. To facilitate quantitatively analyzing and assessing the impact of external disturbances on PHIL simulation systems, a framework for sensitivity analysis of PHIL setups has been developed in this paper. Detailed modelling principles related to the sensitivity analysis of PHIL systems and the inherent relationship between sensitivity transfer functions and stability criteria are elaborated along with theoretical and experimental validation. Based on this concept, accuracy assessment methods are employed in this framework to quantify generic sensitivity criteria. Moreover, physical passive load and converter-based PHIL setups are applied and experimental results are presented to characterize and demonstrate the applicability of the proposed framework.
2022-10-05
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
JRC128650
2169-3536 (online),   
https://ieeexplore.ieee.org/document/9893124,    https://publications.jrc.ec.europa.eu/repository/handle/JRC128650,   
10.1109/ACCESS.2022.3206780 (online),   
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