Standard tests on ISO/IEC 14443 proximity integrated circuit cards/objects include verification that the amplitude of the modulation is within specification, performed by digitizing a test-antenna signal with an ordinary digital storage oscilloscope and calculating the relevant component with a finite Fourier series. Leakage errors may occur due to lack of synchronization between sampling clock and carrier and limited precision of measurement of carrier frequency, leading to inconsistent test results. The problem is eliminated by the application of a Bartlett window in the time domain. In this paper, the theory of the technique is presented formally. Closed form expressions for the leakage before and after apodization are derived, from which the effects of sampling frequency and carrier frequency, the error in carrier frequency, and the number of samples can be seen immediately.
LEWIS Adam;
BALDINI Gianmarco;
CHAREAU Jean-Marc;
2015-01-21
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
JRC66701
0018-9456,
http://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=6848825,
https://publications.jrc.ec.europa.eu/repository/handle/JRC66701,
10.1109/TIM.2014.2328453,
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