Full metadata record
DC FieldValueLanguage
dc.contributor.authorVAGNER J.en_GB
dc.contributor.authorAUBERT C.en_GB
dc.date.accessioned2010-02-25T16:07:36Z-
dc.date.available1995-03-15en_GB
dc.date.available2010-02-25T16:07:36Z-
dc.date.issued1990en_GB
dc.date.submitted1990-02-28en_GB
dc.identifier.otherEUR 12781 ENen_GB
dc.identifier.urihttp://publications.jrc.ec.europa.eu/repository/handle/JRC7141-
dc.description.abstractAbstract not availableen_GB
dc.description.sponsorshipNA-NOT AVAILABLEen_GB
dc.format.mediumPrinteden_GB
dc.languageENGen_GB
dc.publisherCECen_GB
dc.relation.ispartofseriesJRC7141en_GB
dc.titleStructural Reliability Benchmark Exercise for Primary Circuit Components Life Prediction Methodsen_GB
dc.typeEUR - Scientific and Technical Research Reportsen_GB
JRC Directorate:Joint Research Centre Historical Collection

Files in This Item:
There are no files associated with this item.


Items in repository are protected by copyright, with all rights reserved, unless otherwise indicated.